The e-See project aims at studying electric phenomena (charges, electric fields, electrostatic potential) in semiconducting nanostructures in a quantitative way, with the ultimate goal of detecting a single deterministically controlled charge with nm scale spatial resolution using electrical in-situ transmission electron microscopy (TEM). Many devices we use in everyday life work because of their electrical properties: for example, our phones and laptops are built with a multitude of transistors. The industry aims to make these transistors smaller, faster and reduce their energy consumption.
This is related to the challenge addressed in this project that nominally identical transistors can have variable performance at short channel length. In a state-of-the-art silicon transistor, we find a channel between source and drain, underneath a gate. Source and drain are made highly conductive using ion implantation, but this can also lead to one or few dopant atoms in the channel, generating a high off current and increasing the power consumption. This variability issue, coming from stray dopants, impacts semiconductor industry today.
Regarding variability, a single atom can create a level in the channel. At room temperature, current flows very fast from source to drain trough the available levels in the channel, and electrons are therefore delocalized and are very difficult to detect. However, if we lower the temperature of the system, we can trap one or few charges on the available levels in the channel, in a Coulomb blockade experiment. Coulomb blockade is currently used in low temperature transport experiments. However, no direct spatial resolution is obtained in these experiments
Moreover, today no technique exists to look in the volume of the channel, while the device is addressed electrically. Therefore, this is the novel characterization method we are developing.
In the e-See ERC project we aim to combine TEM based techniques such as electron holography and differential phase contrast with low temperature experiments to perform a Coulomb blockade experiment and using the contacts on the transistor for in-situ biasing, providing electrical control of the trapped charge(s).
Adjusting chemical potential of source drain and gate we can put zero charges in the channel, and make an image. Then we adjust the chemical potential to put a single or discrete number of charges in the channel, and make an image. Taking the difference of both images removes all contrast but the influence of the change in charge. The target is therefore to electrically control and spatially locate a single or discrete number of trapped charges in the device volume with nm or even atomic spatial resolution.
We aim to image electrically active and relevant light dopants for the first time in TEM. Moreover, apart from transistors, this method can be applied to many other systems. We are developing a cooled electrical biasing TEM sample holder. We are working on sample preparation using an approach based on nitride membranes and lithography, that we have been pioneering since 2010. And finally aim to combine TEM and transport experiments.